18 March 2009
Author: Giorgos Lazaridis555 Theory
The story began around 1971, when Signetics Corporation first introduced the SE555-NE555, "The IC Time Machine". By that time, it was the first and only integrated circuit with timer functions for commercial use. the original design has change many times since it's birth, but the pin-out is still compatible with the original. New devices with modern technologies and higher speed have been introduced since then, but the old good 555 is still a popular cheap and powerful solution for amateur and professional use.
The 555 came in two packages, the standard DIP package and the metal round package, also called the 'T' package, which was prety much the standard package the first decades that the 555 was first produced. The most popular packages today are the 555 and 556 DIP packages. The 'T' package is no longer produced and the 558 is about to be discontinued due to minimum usage. The pin-outs are shown bellow. The 556 is a Dual 555 and the 558 is a Quad 555:
Ground: This pin is connected to the common (or negative pole of power supply). No need for further explanation
Vcc: AKA Powr Supply. On this pin the power supply for the operation of the 555 is connected. The power supply can be from 5V to 15V (4.5 - 16) and for some military designed packages could go up to 18V. There is not a big difference in timing operation of the 555 by changing the supply voltage, not more than 0.1% per volts which is considered to be stable enough. Actually, the only thing that significantly changes is the output supply capability in terms of voltage and current.
Output: This is the primary output of the 555. it is able to provide up to 1.7V lower than Vcc, about 3.3Volts for 5Vcc and 13.3 for 15Vcc. The output saturation levels depends on the Vcc. Typically, at Vcc=5V the low state is 0.25V at 5mA and could sink up to 200mA when Vcc=15V and an output low voltage of 2V is allowable.
The output is comes from Darlington transistors, providing high state output voltages with good noise margin, able to interface directly with logic circuits. Rise and fall times are typically as fast as 100nSec.
Trigger: This pin is the input to the lower comparator. It is used to control the latch that will set the output to high state. This triggering is done when the pin voltage is taken from above to below the one third (1/3) of the voltage level, that could be 1/2 of the voltage appeared at pin 5. A trigger could be accomplished from a slow ROC (rate of changing) waveform or even from pulses, due to the fact that the input is level sensitive. The allowable voltage range for triggering is between +V and ground. The current needed is typically 500nA.
Two precautions should be taken in account. First, the period of the trigger input signal should not remain lower than 1/3 of the Vcc for longer than the time cycle. In this case, the timer will re-trigger upon termination of the first output pulse. In monostable mode, the input trigger should be effectively shortened by differention. The minimum allowable pulse with for triggering is somewhat dependent upon pulse level, but in general, greater than 1μSec is reliable.
A second precaution that should be taken into account is the storage time in the lower comparator. This portion of the circuit can exhibit normal turn-off delays of several μSecs after triggering. The latch may still have a trigger input for this period of time after the trigger pulse. In this case, the minimum monostable output pulse width should be in the order of 10μSec to prevent possible re-triggering.
Control voltage: By this pin someone can gain access to the 2/3 of the Vcc on the voltage-divider point. That is the reference point of the upper comparator, and an indirect access to the lower comparator reference. When this pin is connected to an external voltage, the 555 operates in voltage-controlled. When in this mode, the voltage control ranges from 1V bellow the Vcc down to 2Volts above ground. Voltages outside those limits can be safely applied but with not a reliable operation.
This pin expands the uses of the chip. In monostable mode, When external power is connected, the timing of the device can be altered with no respect to the RC timing circuit, and the control voltage may vary from 45% to 90% of Vcc. In astable mode, applying voltage to that pin will make it act as a Frequency Modulator (FM).
This pin in basic wiring is not needed to be connected, instead a capacitor around 10nF is connected from this pin to the ground to reduce any parasitic noise. The capacitor can be omitted but is highly recommended to avoid false triggers.
Reset: This pin is used to set the output to the low state by resetting the latch circuit, regardless the states of any other input. A voltage of 0.5Volts and above with more than 0.1mA current is needed to accomplish a successful latch reset (Flip-flop output), and it will be accomplished with a delay of about 0.45μSec. The pulse with should be more than 0.5μSec. Those numbers are not guaranteed and may vary from manufacturer to manufacturer.
If this pin is not used, it is highly recommended to be connected to the Vcc to avoid any false reset.
Threshold: This is the input to the upper comparator. When the voltage at this pin is taken from below to above 2/3 of Vcc, it will reset the latch circuit and set the output to low state. Same as the trigger input, this pin is level sensitive and will permit slow ROC waveforms to perform a reset. The voltage that can be applied at this pin is between Vcc and ground, with a typical current of about 0.1μA.
Discharge: This pin will discharge the timing capacitor which is usually connected between pin 7 and ground. A voltage of about 100mV and a current of about 5mA is usually needed. Neither of those numbers is guaranteed by the manufacturers.
In certain cases, this output can be also used as an auxiliary output same as pin3.
Inside the 555
Following you can see the schematic diagram of a 555. Note that not all manufacturers follow the same drawings, just the same principal of operation. Depending to the manufacturer, a 555 could have around 20 transistors, 15 resistors and a couple of diodes.
And the clue of the day: The 555 took it's name from the three 5K resistors performing the voltage divider !
555 Operation theory
The 555 operation is very simple. It uses a capacitor and one or two resistors to generate the pulses in 4 steps. To describe those steps, first you should take a closer look to the following drawing, demonstrating the 555 exposed and the minimum external parts required so that the 555 will generate pulses. Those pulses are generated on the pin number 3 (right side of the drawing). The three basic parts needed are connected on the left side of the 555 drawing. Those parts are the R1, the R2 and the capacitor C, and they define the so called 'RC network':
Up and down in 4 steps!
By this time, the capacitor is considered to be empty. Because of that, the input - of the lower comparator will be more negative than the input + of it. This will generate a high (1) signal at the output of this comparator that will set the flip flop. The flip flop will finally set high the Q output.
This is the first critical time of the operation cycle. The capacitor will start increasing it's load from within the resistors R1 + R2. During all this time, the Q output will remain high due to the latch of the flip flop, however the output of the lower comparator will have become low as the - input will have become more positive than the + input of the comparator.
Well, not quite filled, but almost filled. Step 3 will occur when the capacitor has equal to the 2/3 of the Vcc voltage charge. When it does, the input + of the upper comparator will become more positive than it's input -. This will cause the upper comparator's output to become high state and reset the flip flop. Reseting the flip flop will cause the output of the 555 to return to low state.
When the previous step occurred, the upper comparator reseted the flip flop and the output Q of the flip flop became low. the reverse Q output will therefore become high. This signal is applied to the base of the transistor that it's colloector is the input 7 of the 555. The transistor's CE will become conductive, and the capacitor will start discharging from within R2 and the transistor.
When the capacitor is fully discharge, step 1 will occur again and so on and so on...
Pulse time calculations
As described before, the two stated of the output, the high and the low state, depends on the values of the R1, R2 and the capacitor C. Moreover, the high state depends on the R1+R2 and the capacitor C, and the low state depends on the R2 and the C. The formulas for calculating the oscillation frequency and the duty cycle are as follows:
The High output state that depends on both R1 + R2, is:
THIGH = 0.67 x (R1 + R2) x C (result in Seconds)
The Low output state depends only on R2 and is:
TLOW = 0.67 x R2 x C (result in Seconds)
To calculate the oscillation frequency, we add THIGH and TLOW.
TTOTAL = T1 + T2 = 0.67 x (R1 + R2) x C + 0.67 x R2 x C =>
TTOTAL = 0.67 (R1 + 2 x R2) x C
The TTOTAL is actually the period of the oscillation measured in seconds. Therefore, the frequency is:
Although there is not a standard way to wire the 555, there are actually two standard ways that are most used. The first way is the Monostable Mode connection and the second the Astable Mode connection.
The 555 as Monostable Multivibrator
The wiring of 555 as a monostable multivibrator is shown in the following circuit:
When in input 2 of the 555 (trigger) is sent a low pulse, the output will go high. The output will remain high for a period of:
THIGH = 1.1 x R x C (Seconds)
There are several applications that a monostable circuit as the above is used. With very short periods, it could be used as a switch debouncer or a logic driver from fast acting sensors. Medium periods, like 1-10 seconds could be used for indication sound signals or any other general delay like car cabin lights turn off delay. Bigger periods can be used for delay timers.
The 555 as Astable Multivibrator
An astable multivibrator is often called also oscillator. A 555 can be used to generate clock pulses in a wide range of frequencies with enough output power to drive several ICs. The circuit is shown bellow:
The oscillation frequency is calculated with the following formula:
The same circuit can be used to control DC loads such as LEDs, lamps and DC motors. The idea is to use this circuit as a PWM signal generator. To do this, you need to replace R2 with a potentiometer. By altering the potentiometer's value, this results in changing the duty cycle output. The duty cycle is calculated as follows:
D = TTOLAL / THIGH =>
In a first glance, someone can understand that the minimum duty cycle could be no less than 50%. This is true. check the tips and tricks bellow to find out how can you achieve duty cycle less than 50%.