The Status register contains the arithmetic status of the Arithmetic Logic Unit, the Reset status of the PIC and the Bank Selection bits, direct and indirect. The Status register is accessible from all 4 banks. The bits of the Status register as as follows:

This bit is Readable and Writable and after a reset it's value will be unknown. If an instruction executed has an effect on this bit, then this bit becomes automatically and temporarily Read Only. The Carry bit watches if a carry-out from the MSB bit occurs. The values it can get are:

• 0: No carry-out from the MSB of the result occurred
• 1: A carry-out from the MSB of the result occurred

This bit is Readable and Writable and after a reset it's value will be unknown. If an instruction executed has an effect on this bit, then this bit becomes automatically and temporarily Read Only. The Digit Carry bit watches if a carry out from the 4^th lower order of the byte is occurred. The values it can get are:

• 0: No carry-out from 4^th lower order of the byte occurred
• 1: A carry-out from the 4^th lower order of the byte occurred

This bit is Readable and Writable and after a reset it's value will be unknown. If an instruction executed has an effect on this bit, then this bit becomes automatically and temporarily Read Only. The Zero bit watches if the result of an arithmetic or logic operation was zero. The values it can get are:

• 0: The result of an arithmetic or logic operation was not zero
• 1: The result of an arithmetic or logic operation was zero

This bit is Read Only and after a reset it will get the value 1. The Power Down bit watches if the 'SLEEP' instruction was executed. The values it can get are:

• 0: The 'SLEEP' instruction was executed
• 1: Power Up or the 'CLRWDT' instruction was executed

This bit is Read Only and after a reset it will get the value 1. The Power Down bit watches if a Watchdog timer time out occurred. The values it can get are:

• 0: A Watchdog timer time out occured
• 1: Power Up, 'SLEEP' or 'CLRWDT' instruction was executed

Those bits are Readable and Writable and after a reset it will all get the value 0. Their task is to select the active Register Bank in use. The values it can get are:

• 00: Bank 0 is selected
• 01: Bank 1 is selected
• 10: Bank 2 is selected
• 11: Bank 3 is selected

During the indeterminate pages of this book, the indirect addressing shall be discussed and explained. The indirect addressing is a way of accessing registers (General Purpose or Special Function Registers) without directly accessing their memory position, but throughout an indirect addressing register. When this register is used, the current bank selected is different than the indirect current bank selected. The values it can get are:

• 0: Indirect addressing current bank selected is Bank 0 and Bank 1
• 1: Indirect addressing current bank selected is Bank 2 and Bank 3

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Basics       What will you need       Choosing the right PICThe MPLAB       Getting familiar with the MPLAB environment       Creating a new project       Open and close projects       Creating new files and including them in the project       Your very first assembly program       Compile a program and transfer to the PICSection 1: Beginner's theoryMemory Organization       The Data Memory Organization       The Program Memory OrganizationThe instructions       General knowledge about instructions       Value Loading Instructions       Program Flow Instructions       Mathematic Instructions       Logic Function Instructions       Bit Orientated Instructions       Byte Orientated Instructions       Miscellaneous InstructionsThe Basic Special Function Registers       The Status Register       The Option_Reg Register       The TRIS and PORT registersBeginner's PIC Tutorials       How to use our PIC Tutorials       A Pushbutton turning an LED on and off       A Simple LED Flasher       Interfacing Multiple Switches - The internal Pull-Up resistors       An LED Sequencer       Interface a Single 7seg Digit       Interface Multiple 7seg Digits       A 3-digits Decimal Counter       A Clever ButtonSection 2: Intermediate theory       Instruction Cycle Duration and Calculated Delays       The Timer Modules - Timer0       The Timer Modules - Timer1       The Timer Modules-Timer2

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